1. Field of the Invention
The present invention relates to a manufacturing method for a semiconductor device and a semiconductor device and, in particular, to a manufacturing method for a semiconductor device having protrusion electrodes which are aligned on a semiconductor substrate at narrow intervals, and a semiconductor device that is obtained according to this manufacturing method.
2. Description of Related Art
According to a mounting technology for a semiconductor device, there is a so-called flip chip connection where a semiconductor chip is directly connected to another wiring substrate without being packaged. Protrusion electrodes are formed on a semiconductor chip for flip chip connection so that the semiconductor chip can be joined to electrode pads or the like formed on a wiring substrate via the protrusion electrodes. 
FIG. 5 is a cross-sectional view illustrating a conventional semiconductor device on which a protrusion electrode is formed.
This semiconductor device has a semiconductor substrate 109 which is not packaged, thus making a so-called flip chip connection possible. An active layer 102 that includes a function element (device) and a wire is formed on one surface of semiconductor substrate 109. An electrode pad and a wire (hereinafter, these are collectively referred to as “electrode pad”) 103 which are electrically connected to the function element in active layer 102 are formed in a predetermined position on active layer 102. Electrode pad 103 is made of metal.
A passivation film 108 for protecting active layer 102 is formed on active layer 102. An opening 108a is formed in passivation film 108 so as to expose electrode pad 103.
A protrusion electrode 107 is formed on electrode pad 103 that is exposed through opening 108a in passivation film 108, with a barrier metal layer (UBM: Under Bump Metal) 104 and a seed layer 105 interposed therebetween. Electrode pad 103 and active layer 102 are protected by barrier metal layer 104.
This semiconductor device makes a flip chip connection possible by joining protrusion electrode 107 to an electrode pad formed on a wiring substrate or another semiconductor device. As a result of this, the function element in active layer 102 can be externally connected.
FIG. 6(a) to FIG. 6(c) are cross-sectional views illustrating a manufacturing method for the semiconductor device shown in FIG. 5.
An active layer 102 that includes a function element and a wire is formed on one surface, which has been flattened in advance, of a semiconductor substrate 101 (for example, a semiconductor wafer) where regions corresponding to a plurality of semiconductor substrates 109 are densely formed, and an electrode pad 103 for electrically connecting the function element or the like in active layer 102 to the outside is formed in a predetermined position on active layer 102.
Next, a passivation film 108 is formed on semiconductor substrate 101, and an opening 108a is formed in this passivation film 108 so as to expose electrode pad 103. Then, a barrier metal layer 104 is formed on the entirety of the surface of semiconductor substrate 101, which has undergone the above described process, on the active layer 102 side. Then, a seed layer 105 is formed on the entirety of the surface of barrier metal layer 104. FIG. 6(a) shows this state.
Furthermore, a resist film (photo resist) 106 having an opening 106a in a portion corresponding to electrode pad 103 is formed on seed layer 105 (see FIG. 6(b)). Opening 108a is positioned within opening 106a as seen in the plan view where semiconductor substrate 101 is vertically viewed from the top. Opening 106a has an inner side walls approximately vertical to semiconductor substrate 101.
After that, a protrusion electrode 107 is formed within opening 106a in resist film 106 by means of electrolysis plating. At this time, a current flows to the plating solution via barrier metal layer 104 and seed layer 105, which becomes the starting point of the plating growth when electrolysis plating is carried out. As a result of this, a metal such as copper is coated on seed layer 105, thus forming protrusion electrode 107.
The formation of protrusion electrode 107 is completed before the thickness (height from seed layer 105) of protrusion electrode 107 exceeds the thickness of resist layer 106. As a result of this, a state is reached where protrusion electrode 107 exists only within opening 106a. FIG. 6(c) shows this state.
Subsequently, resist film 106 is removed, and furthermore, seed layer 105 is removed by means of dry etching, except for the portion that exists between barrier metal layer 104 and protrusion electrode 107. Then, barrier metal layer 104 is removed by means of wet etching, except for the portion that exists between electrode pad 103 and seed layer 105, as well as between passivation film 108 and seed layer 105. As a result of this, protrusion electrode 107 that protrudes from semiconductor substrate 101 (passivation film 108) is obtained.
After that, semiconductor substrate 101 is cut into pieces of a semiconductor substrate 109, thus obtaining a semiconductor device having protrusion electrode 107, as shown in FIG. 5. Such a manufacturing method for a semiconductor device is disclosed in, for example, “Chisso's Wafer Bumping Service” by Yoshiaki Yamamoto, Densi Zairyo (Electronic Material), May 1995, p. 101–104.
At the time when barrier metal layer 104 is removed by means of wet etching, however, it is difficult to control the amount of etching, and sometimes barrier metal layer 104 between protrusion electrode 107 and electrode pad 103 as well as between electrode 107 and passivation film 108 is also removed (over-etched). The amount of this over-etching, that is, the amount of etching in the direction inwardly from the edge portion of protrusion electrode 107 is, for example, approximately 2 μm as seen in the plan view where semiconductor substrate 101 is vertically viewed from the top. In this case, the strength of the connection between protrusion electrode 107 and electrode pad 103 is reduced.
In addition, in the case where over-etching of barrier metal layer 104 progresses excessively to the extent where barrier metal layer 104 that exists between electrode pad 103 and protrusion electrode 107 is also etched, an exposed (uncoated) region occurs in electrode pad 103. This leads to reduction in the reliability of the device due to corrosion or the like of electrode pad 103.
In order to avoid the above described problems, the size of protrusion electrode 107 in the directions along semiconductor substrate 101 (hereinafter referred to as “width of protrusion electrode 107”) must be greater than the width of the portion of electrode pad 103 that is exposed through passivation film 108 (width of opening 108a) by at least 2 μm on each side.
Furthermore, taking into consideration an exposure shift in the case where opening 106a in resist film 106 is formed by means of exposure to light and developing, and dispersion in the width of protrusion electrode 107 that is formed by means of electrolysis plating, it is necessary for the width of protrusion electrode 107 to be greater than the portion of electrode pad 103 that is exposed through passivation film 108 by approximately 5 μm on each side. That is, even in the case where the width of the portion of electrode pad 103 that is exposed through passivation film 108 is set at 1 μm, the width of protrusion electrode 107 becomes approximately 11 μm. Namely, the reduction in the size of protrusion electrode 107 or miniaturization of protrusion electrode 107, and the reduction in the intervals of the protrusion electrodes 107, cannot be achieved.
In addition, though it is preferable for the inner wall surface of opening 108a in passivation film 108 to be straight (vertical to semiconductor substrate 101) or to be in a taper form that expands laterally in the upward direction, in some cases, the inner wall surface becomes a reverse taper form (taper form that expands laterally in the downward direction (from the semiconductor substrate 101 side)).
In this case, in the case where barrier metal layer 104 that becomes a base for plating (of seed layer 105) is formed by means of anisotropic sputtering or the like, the portion in the vicinity of the inner wall surface of opening 108a in reverse taper form cannot be coated with barrier metal layer 104, resulting in an exposed region (not coated with barrier metal layer 104) in electrode pad 103. In this case, metal diffusion occurs between electrode pad 103 and protrusion electrode 107, thus reducing the reliability.
Furthermore, a step is formed in barrier metal layer 104 that becomes a base for plating, and in seed layer 105 due to opening 108a in passivation film 108. As a result of this, the end surface (top surface) of protrusion electrode 107 has a form with a recess in the center portion reflecting this step, as shown in FIG. 5. When a semiconductor device where such a protrusion electrode 107 is formed is joined to electrode pads or the like formed on a wiring substrate, protrusion electrode 107 cannot be connected well to the electrode pad of the wiring substrate, causing a mechanical defect or an electrical defect in the connection.